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NXP Semiconductors /LPC18xx /EEPROM /INTSTATCLR

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Interpret as INTSTATCLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED 0 (PROG_CLR_ST)PROG_CLR_ST 0RESERVED

Description

EEPROM interrupt status clear

Fields

RESERVED

Reserved. Read value is undefined, only zero should be written.
PROG_CLR_ST

Clear program operation finished interrupt status bit for EEPROM device. 0 = leave corresponding bit unchanged. 1 = clear corresponding bit.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data